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1. general description the 74lvu04 is a low-voltage si-gate cmos device that is pin and function compatible with 74hcu04. the 74lvu04 is a general purpose hex inverter. each of the six inverters is a single stage with unbuffered outputs. 2. features n wide operating voltage: 1.0 v to 5.5 v n optimized for low voltage applications: 1.0 v to 3.6 v n typical output ground bounce < 0.8 v at v cc = 3.3 v and t amb = 25 c n typical high-level output voltage (v oh ) undershoot: > 2 v at v cc = 3.3 v and t amb =25 c n esd protection: u hbm jesd22-a114e exceeds 2000 v u mm jesd22-a115-a exceeds 200 v n multiple package options n speci?ed from - 40 cto+85 c and from - 40 c to +125 c 3. applications n linear ampli?er n crystal oscillator n astable multivibrator 74lvu04 hex inverter rev. 06 20 december 2007 product data sheet
74lvu04_6 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 06 20 december 2007 2 of 19 nxp semiconductors 74lvu04 hex inverter 4. ordering information 5. functional diagram table 1. ordering information type number package temperature range name description version 74lvu04n - 40 c to +125 c dip14 plastic dual in-line package; 14 leads (300 mil) sot27-1 74lvu04d - 40 c to +125 c so14 plastic small outline package; 14 leads; body width 3.9 mm sot108-1 74lvu04db - 40 c to +125 c ssop14 plastic shrink small outline package; 14 leads; body width 5.3 mm sot337-1 74lvu04pw - 40 c to +125 c tssop14 plastic thin shrink small outline package; 14 leads; body width 4.4 mm sot402-1 74lvu04bq - 40 c to +125 c dhvqfn14 plastic dual in-line compatible thermal enhanced very thin quad ?at package; no leads; 14 terminals; body 2.5 3 0.85 mm sot762-1 fig 1. logic symbol fig 2. iec logic symbol fig 3. circuit diagram (one inverter) mna342 1a 1y 1 2 2a 2y 3 4 3a 3y 5 6 4a 4y 9 8 5a 5y 11 10 6a 6y 13 12 1 1 2 mna343 3 1 4 5 1 6 9 1 8 11 1 10 13 1 12 001aah110 100 w v cc na ny v cc v cc 170 w
74lvu04_6 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 06 20 december 2007 3 of 19 nxp semiconductors 74lvu04 hex inverter 6. pinning information 6.1 pinning 6.2 pin description (1) the die substrate is attached to this pad using conductive die attach material. it can not be used as a supply pin or input. fig 4. pin con?guration dip14, so14 and (t)ssop14 fig 5. pin con?guration dhvqfn14 74lvu04 1a v cc 1y 6a 2a 6y 2y 5a 3a 5y 3y 4a gnd 4y 001aah108 1 2 3 4 5 6 7 8 10 9 12 11 14 13 001aah109 74lvu04 transparent top view 3y 4a 3a v cc (1) 5y 2y 5a 2a 6y 1y 6a gnd 4y 1a v cc 6 9 5 10 4 11 3 12 2 13 7 8 1 14 terminal 1 index area table 2. pin description symbol pin description 1a 1 data input 1y 2 data output 2a 3 data input 2y 4 data output 3a 5 data input 3y 6 data output gnd 7 ground (0 v) 4y 8 data output 4a 9 data input 5y 10 data output 5a 11 data input 6y 12 data output 6a 13 data input v cc 14 supply voltage
74lvu04_6 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 06 20 december 2007 4 of 19 nxp semiconductors 74lvu04 hex inverter 7. functional description [1] h = high voltage level; l = low voltage level. 8. limiting values [1] the input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] p tot derates linearly with 12 mw/k above 70 c. [3] p tot derates linearly with 8 mw/k above 70 c. [4] p tot derates linearly with 5.5 mw/k above 60 c. [5] p tot derates linearly with 4.5 mw/k above 60 c. table 3. function table [1] input na output ny lh hl table 4. limiting values in accordance with the absolute maximum rating system (iec 60134). voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min max unit v cc supply voltage - 0.5 +7.0 v i ik input clamping current v i < - 0.5 v or v i >v cc + 0.5 v [1] - 20 ma i ok output clamping current v o < - 0.5 v or v o >v cc + 0.5 v [1] - 50 ma i o output current v o = - 0.5 v to (v cc + 0.5 v) - 25 ma i cc supply current - 50 ma i gnd ground current - 50 - ma t stg storage temperature - 65 +150 c p tot total power dissipation t amb = - 40 c to +125 c dip14 package [2] - 750 mw so14 package [3] - 500 mw (t)ssop14 package [4] - 500 mw dhvqfn14 package [5] - 500 mw
74lvu04_6 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 06 20 december 2007 5 of 19 nxp semiconductors 74lvu04 hex inverter 9. recommended operating conditions [1] the static characteristics are guaranteed from v cc = 1.2 v to v cc = 5.5 v, but lv devices are guaranteed to function down to v cc = 1.0 v (with input levels gnd or v cc ). 10. static characteristics table 5. recommended operating conditions voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min typ max unit v cc supply voltage [1] 1.0 3.3 5.5 v v i input voltage 0 - v cc v v o output voltage 0 - v cc v t amb ambient temperature - 40 +25 +125 c d t/ d v input transition rise and fall rate v cc = 1.0 v to 2.0 v - - 500 ns/v v cc = 2.0 v to 2.7 v - - 200 ns/v v cc = 2.7 v to 3.6 v - - 100 ns/v v cc = 3.6 v to 5.5 v - - 50 ns/v table 6. static characteristics voltages are referenced to gnd (ground = 0 v). symbol parameter conditions - 40 c to +85 c - 40 c to +125 c unit min typ [1] max min max v ih high-level input voltage v cc = 1.2 v 1.0 - - 1.0 - v v cc = 2.0 v 1.6 - - 1.6 - v v cc = 2.7 v to 3.6 v 2.4 - - 2.4 - v v cc = 4.5 v to 5.5 v 0.8v cc - - 0.8v cc -v v il low-level input voltage v cc = 1.2 v - - 0.2 - 0.2 v v cc = 2.0 v - - 0.4 - 0.4 v v cc = 2.7 v to 3.6 v - - 0.5 - 0.5 v v cc = 4.5 v to 5.5 v - - 0.2v cc - 0.2v cc v v oh high-level output voltage v i = v ih or v il i o = - 100 m a; v cc = 1.2 v - 1.2 - - - v i o = - 100 m a; v cc = 2.0 v 1.8 2.0 - 1.8 - v i o = - 100 m a; v cc = 2.7 v 2.5 2.7 - 2.5 - v i o = - 100 m a; v cc = 3.0 v 2.8 3.0 - 2.8 - v i o = - 100 m a; v cc = 4.5 v 4.3 4.5 - 4.3 - v i o = - 6 ma; v cc = 3.0 v 2.4 2.82 - 2.2 - v i o = - 12 ma; v cc = 4.5 v 3.6 4.2 - 3.5 - v
74lvu04_6 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 06 20 december 2007 6 of 19 nxp semiconductors 74lvu04 hex inverter [1] typical values are measured at t amb = 25 c. 11. dynamic characteristics [1] all typical values are measured at t amb =25 c. [2] t pd is the same as t plh and t phl . [3] typical values are measured at nominal supply voltage (v cc = 3.3 v). [4] c pd is used to determine the dynamic power dissipation (p d in m w). p d =c pd v cc 2 f i n+ s (c l v cc 2 f o ) where: f i = input frequency in mhz, f o = output frequency in mhz c l = output load capacitance in pf v cc = supply voltage in v n = number of inputs switching s (c l v cc 2 f o ) = sum of the outputs. v ol low-level output voltage v i = v ih or v il i o = 100 m a; v cc = 1.2 v - 0 - - - v i o = 100 m a; v cc = 2.0 v - 0 0.2 - 0.2 v i o = 100 m a; v cc = 2.7 v - 0 0.2 - 0.2 v i o = 100 m a; v cc = 3.0 v - 0 0.2 - 0.2 v i o = 100 m a; v cc = 4.5 v - 0 0.2 - 0.2 v i o = 6 ma; v cc = 3.0 v - 0.25 0.40 - 0.50 v i o = 12 ma; v cc = 4.5 v - 0.35 0.55 - 0.65 v i i input leakage current v i =v cc or gnd; v cc = 5.5 v - - 1.0 - 1.0 m a i cc supply current v i = v cc or gnd; i o = 0 a; v cc = 5.5 v - - 20.0 - 40 m a c i input capacitance - 3.5 - - - pf table 6. static characteristics continued voltages are referenced to gnd (ground = 0 v). symbol parameter conditions - 40 c to +85 c - 40 c to +125 c unit min typ [1] max min max table 7. dynamic characteristics gnd = 0 v; for test circuit see figure 7 . symbol parameter conditions - 40 c to +85 c - 40 c to +125 c unit min typ [1] max min max t pd propagation delay na, nb to ny; see figure 6 [2] v cc = 1.2 v - 35 - - - ns v cc = 2.0 v - 12 14 - 17 ns v cc = 2.7 v - 9 10 - 13 ns v cc = 3.0 v to 3.6 v; c l =15pf [3] -6- - -ns v cc = 3.0 v to 3.6 v [3] - 7 8 - 10 ns v cc = 4.5 v to 5.5 v - - 7 - 9 ns c pd power dissipation capacitance c l = 50 pf; f i = 1 mhz; v i = gnd to v cc [4] -18- - -pf
74lvu04_6 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 06 20 december 2007 7 of 19 nxp semiconductors 74lvu04 hex inverter 12. waveforms measurement points are given in t ab le 8 . v ol and v oh are typical voltage output levels that occur with the output load. fig 6. the input (na) to output (ny) propagation delays mna344 t phl t plh v m v m v m v m na input ny output gnd v i v oh v ol table 8. measurement points supply voltage input output v cc v m v m < 2.7 v 0.5v cc 0.5v cc 2.7 v to 3.6 v 1.5 v 1.5 v 3 4.5 v 0.5v cc 0.5v cc test data is given in t ab le 9 . de?nitions test circuit: r t = termination resistance should be equal to output impedance z o of the pulse generator. r l = load resistance. c l = load capacitance including jig and probe capacitance. fig 7. load circuit for switching times v cc v i v o 001aaa663 d.u.t. c l 50 pf r t r l 1 k w pulse generator table 9. test data supply voltage input v cc v i t r , t f < 2.7 v v cc 2.5 ns 2.7 v to 3.6 v 2.7 v 2.5 ns 3 4.5 v v cc 2.5 ns
74lvu04_6 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 06 20 december 2007 8 of 19 nxp semiconductors 74lvu04 hex inverter 13. transfer characteristics t amb = 25 c. t amb = 25 c. fig 8. v cc = 1.2 v; i o = 0 a fig 9. v cc = 2.0 v; i o =0 a 001aah111 v i (v) 0 1.2 0.8 0.4 0.4 0.8 1.2 v o (v) 0 100 200 300 i cc ( m a) 0 v o i cc 001aah112 v i (v) 0 2.0 1.6 0.8 1.2 0.4 0.8 1.2 0.4 1.6 2.0 v o (v) 0 2 3 1 4 5 i cc (ma) 0 v o i cc t amb = 25 c. f i = 1 khz at v o is constant fig 10. v cc = 3.0 v; i o = 0 a fig 11. test set-up for measuring forward transconductance 001aah113 v i (v) 0 3.0 2.0 1.0 1.0 2.0 3.0 v o (v) 0 6 12 18 i cc (ma) 0 v o i cc mna050 v cc r bias = 560 k w input 0.47 m f 100 m f output a gnd i o v i (f = 1 khz) g fs d i o d v i --------- - =
74lvu04_6 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 06 20 december 2007 9 of 19 nxp semiconductors 74lvu04 hex inverter t amb = 25 c. fig 12. forward transconductance as a function of the supply voltage 001aah114 v cc (v) 04 3 12 20 10 30 40 g fs (ma/v) 0
74lvu04_6 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 06 20 december 2007 10 of 19 nxp semiconductors 74lvu04 hex inverter 14. application information some applications are: ? linear ampli?er (see figure 13 ) ? in crystal oscillator design (see figure 14 ) ? astable multivibrator (see figure 15 ) remark: all values given are typical unless otherwise speci?ed. maximum v o(p-p) =v cc - 1.5 v centered at 0.5v cc . g ol = open loop gain g v = voltage gain c i , see figure 16 r1 3 3k w ,r2 1m w z l >10k w ; g ol = 20 (typical) typical unity gain bandwidth product is 5 mhz. c1 = 47 pf (typical) c2 = 22 pf (typical) r1 = 1 m w to 10 m w (typical) r2 optimum value depends on the frequency and required stability against changes in v cc or average minimum i cc (i cc is typically 2 ma at v cc = 3 v and f i = 1 mhz). see t ab le 10 and t ab le 11 fig 13. linear ampli?er fig 14. crystal oscillator u04 r1 r2 v cc z l mna052 1 m f mna053 u04 out r2 r1 c1 c2 g v g ol 1 r1 r2 ------ - 1g ol + () + --------------------------------------- C = table 10. external components for oscillator ( f < 1 mhz) all values given are typical and must be used as an initial set-up. frequency r1 r2 c1 c2 10 khz to 15.9 khz 2.2 m w 220 k w 56 pf 20 pf 16 khz to 24.9 khz 2.2 m w 220 k w 56 pf 10 pf 25 khz to 54.9 khz 2.2 m w 100 k w 56 pf 10 pf 55 khz to 129.9 khz 2.2 m w 100 k w 47 pf 5 pf 130 khz to 199.9 khz 2.2 m w 47 k w 47 pf 5 pf 200 khz to 349.9 khz 2.2 m w 47 k w 47 pf 5 pf 350 khz to 600 khz 2.2 m w 47 k w 47 pf 5 pf
74lvu04_6 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 06 20 december 2007 11 of 19 nxp semiconductors 74lvu04 hex inverter table 11. optimum value for r2 frequency r2 optimum for 3 khz 2.0 k w minimum required i cc 8.0 k w minimum in?uence due to change in v cc 6 khz 1.0 k w minimum required i cc 4.7 k w minimum in?uence due to change in v cc 10 khz 0.5 k w minimum required i cc 2.0 k w minimum in?uence due to change in v cc 14 khz 0.5 k w minimum required i cc 1.0 k w minimum in?uence due to change in v cc >14 khz - replace r2 by c3 with a typical value of 35 pf the average i cc (ma) is approximately 3.5 + 0.05 x f (mhz) x c (pf) at v cc = 3.0 v. v cc = 1.2 v v cc = 2.0 v v cc = 3.0 v t amb = 25 c. fig 15. astable multivibrator fig 16. input capacitance as function of input voltage 001aah115 r s rc u04 u04 001aah116 input voltage (v) 03 2 1 (1) (2) (3) 40 20 60 80 input capacitance (pf) 0 f 1 t --- 1 2.2rc --------------- - ? = r s 2r ?
74lvu04_6 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 06 20 december 2007 12 of 19 nxp semiconductors 74lvu04 hex inverter 15. package outline fig 17. package outline sot27-1 (dip14) unit a max. 1 2 (1) (1) b 1 cd (1) z ee m h l references outline version european projection issue date iec jedec jeita mm inches dimensions (inch dimensions are derived from the original mm dimensions) sot27-1 99-12-27 03-02-13 a min. a max. b max. w m e e 1 1.73 1.13 0.53 0.38 0.36 0.23 19.50 18.55 6.48 6.20 3.60 3.05 0.254 2.54 7.62 8.25 7.80 10.0 8.3 2.2 4.2 0.51 3.2 0.068 0.044 0.021 0.015 0.77 0.73 0.014 0.009 0.26 0.24 0.14 0.12 0.01 0.1 0.3 0.32 0.31 0.39 0.33 0.087 0.17 0.02 0.13 050g04 mo-001 sc-501-14 m h c (e ) 1 m e a l seating plane a 1 w m b 1 e d a 2 z 14 1 8 7 b e pin 1 index 0 5 10 mm scale note 1. plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. dip14: plastic dual in-line package; 14 leads (300 mil) sot27-1
74lvu04_6 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 06 20 december 2007 13 of 19 nxp semiconductors 74lvu04 hex inverter fig 18. package outline sot108-1 (so14) unit a max. a 1 a 2 a 3 b p cd (1) e (1) (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec jeita mm inches 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 8.75 8.55 4.0 3.8 1.27 6.2 5.8 0.7 0.6 0.7 0.3 8 0 o o 0.25 0.1 dimensions (inch dimensions are derived from the original mm dimensions) note 1. plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 1.0 0.4 sot108-1 x w m q a a 1 a 2 b p d h e l p q detail x e z e c l v m a (a ) 3 a 7 8 1 14 y 076e06 ms-012 pin 1 index 0.069 0.010 0.004 0.057 0.049 0.01 0.019 0.014 0.0100 0.0075 0.35 0.34 0.16 0.15 0.05 1.05 0.041 0.244 0.228 0.028 0.024 0.028 0.012 0.01 0.25 0.01 0.004 0.039 0.016 99-12-27 03-02-19 0 2.5 5 mm scale so14: plastic small outline package; 14 leads; body width 3.9 mm sot108-1
74lvu04_6 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 06 20 december 2007 14 of 19 nxp semiconductors 74lvu04 hex inverter fig 19. package outline sot337-1 (ssop14) unit a 1 a 2 a 3 b p cd (1) e (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec jeita mm 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 6.4 6.0 5.4 5.2 0.65 1.25 0.2 7.9 7.6 1.03 0.63 0.9 0.7 1.4 0.9 8 0 o o 0.13 0.1 dimensions (mm are the original dimensions) note 1. plastic or metal protrusions of 0.25 mm maximum per side are not included. sot337-1 99-12-27 03-02-19 (1) w m b p d h e e z e c v m a x a y 1 7 14 8 q a a 1 a 2 l p q detail x l (a ) 3 mo-150 pin 1 index 0 2.5 5 mm scale ssop14: plastic shrink small outline package; 14 leads; body width 5.3 mm sot337-1 a max. 2
74lvu04_6 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 06 20 december 2007 15 of 19 nxp semiconductors 74lvu04 hex inverter fig 20. package outline sot402-1 (tssop14) unit a 1 a 2 a 3 b p cd (1) e (2) (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec jeita mm 0.15 0.05 0.95 0.80 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 0.4 0.3 0.72 0.38 8 0 o o 0.13 0.1 0.2 1 dimensions (mm are the original dimensions) notes 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. plastic interlead protrusions of 0.25 mm maximum per side are not included. 0.75 0.50 sot402-1 mo-153 99-12-27 03-02-18 w m b p d z e 0.25 17 14 8 q a a 1 a 2 l p q detail x l (a ) 3 h e e c v m a x a y 0 2.5 5 mm scale tssop14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm sot402-1 a max. 1.1 pin 1 index
74lvu04_6 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 06 20 december 2007 16 of 19 nxp semiconductors 74lvu04 hex inverter fig 21. package outline sot762-1 (dhvqfn14) terminal 1 index area 0.5 1 a 1 e h b unit y e 0.2 c references outline version european projection issue date iec jedec jeita mm 3.1 2.9 d h 1.65 1.35 y 1 2.6 2.4 1.15 0.85 e 1 2 0.30 0.18 0.05 0.00 0.05 0.1 dimensions (mm are the original dimensions) sot762-1 mo-241 - - - - - - 0.5 0.3 l 0.1 v 0.05 w 0 2.5 5 mm scale sot762-1 dhvqfn14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2.5 x 3 x 0.85 mm a (1) max. a a 1 c detail x y y 1 c e l e h d h e e 1 b 26 13 9 8 7 1 14 x d e c b a 02-10-17 03-01-27 terminal 1 index area a c c b v m w m e (1) note 1. plastic or metal protrusions of 0.075 mm maximum per side are not included. d (1)
74lvu04_6 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 06 20 december 2007 17 of 19 nxp semiconductors 74lvu04 hex inverter 16. abbreviations 17. revision history table 12. abbreviations acronym description cmos complementary metal oxide semiconductor esd electrostatic discharge hbm human body model mm machine model ttl transistor-transistor logic table 13. revision history document id release date data sheet status change notice supersedes 74lvu04_6 20071220 product data sheet - 74lvu04_5 modi?cations: ? the format of this data sheet has been redesigned to comply with the new identity guidelines of nxp semiconductors. ? legal texts have been adapted to the new company name where appropriate. ? section 4 : dhvqfn14 package added. ? section 8 : derating values added for dhvqfn14 package. ? section 15 : outline drawing added for dhvqfn14 package. 74lvu04_5 20010111 product speci?cation - 74lvu04_4 74lvu04_4 20001218 product speci?cation - 74lvu04_3 74lvu04_3 19980420 product speci?cation - 74lvu04_1 74lvu04_1 19970212 product speci?cation - -
74lvu04_6 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 06 20 december 2007 18 of 19 nxp semiconductors 74lvu04 hex inverter 18. legal information 18.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term short data sheet is explained in section de?nitions. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple dev ices. the latest product status information is available on the internet at url http://www .nxp .com . 18.2 de?nitions draft the document is a draft version only. the content is still under internal review and subject to formal approval, which may result in modi?cations or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. short data sheet a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request via the local nxp semiconductors sales of?ce. in case of any inconsistency or con?ict with the short data sheet, the full data sheet shall prevail. 18.3 disclaimers general information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. right to make changes nxp semiconductors reserves the right to make changes to information published in this document, including without limitation speci?cations and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use nxp semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an nxp semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. nxp semiconductors accepts no liability for inclusion and/or use of nxp semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customers own risk. applications applications that are described herein for any of these products are for illustrative purposes only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the speci?ed use without further testing or modi?cation. limiting values stress above one or more limiting values (as de?ned in the absolute maximum ratings system of iec 60134) may cause permanent damage to the device. limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the characteristics sections of this document is not implied. exposure to limiting values for extended periods may affect device reliability. terms and conditions of sale nxp semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www .nxp .com/pro? le/ter ms , including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by nxp semiconductors. in case of any inconsistency or con?ict between information in this document and such terms and conditions, the latter will prevail. no offer to sell or license nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 18.4 trademarks notice: all referenced brands, product names, service names and trademarks are the property of their respective owners. 19. contact information for additional information, please visit: http://www .nxp.com for sales of?ce addresses, send an email to: salesad dresses@nxp.com document status [1] [2] product status [3] de?nition objective [short] data sheet development this document contains data from the objective speci?cation for product development. preliminary [short] data sheet quali?cation this document contains data from the preliminary speci?cation. product [short] data sheet production this document contains the product speci?cation.
nxp semiconductors 74lvu04 hex inverter ? nxp b.v. 2007. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com date of release: 20 december 2007 document identifier: 74lvu04_6 please be aware that important notices concerning this document and the product(s) described herein, have been included in section legal information. 20. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 pinning information . . . . . . . . . . . . . . . . . . . . . . 3 6.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 functional description . . . . . . . . . . . . . . . . . . . 4 8 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 9 recommended operating conditions. . . . . . . . 5 10 static characteristics. . . . . . . . . . . . . . . . . . . . . 5 11 dynamic characteristics . . . . . . . . . . . . . . . . . . 6 12 waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 13 transfer characteristics. . . . . . . . . . . . . . . . . . . 8 14 application information. . . . . . . . . . . . . . . . . . 10 15 package outline . . . . . . . . . . . . . . . . . . . . . . . . 12 16 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 17 17 revision history . . . . . . . . . . . . . . . . . . . . . . . . 17 18 legal information. . . . . . . . . . . . . . . . . . . . . . . 18 18.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 18 18.2 de?nitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 18.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 18.4 trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 19 contact information. . . . . . . . . . . . . . . . . . . . . 18 20 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

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